I’m an associate professor in the department of Computer Science at the Eindhoven University of Technology (TU/e). I am the head the Formal System Analysis group.

RESEARCH

My research is in Algorithms and Logics for VErification (ALIVE), and, more broadly, in all means and methods that help designing correct and reliable systems. I work on algorithms and theory for fixed point logics, parity games and applications of model checking. My theories drive the verification technology offered by the mCRL2 toolset to which I contribute in some way or another.

Have a look at our past work verifying the control software of experiments at the LHC at CERN, developing tools and helping improve the quality of the software.

Drop me a mail if you think our group can help you improve your (software) designs. For MSc students looking for MSc final projects: there are external opportunities (e.g. Canon, ASML, Verum) but also in our group.

PUBLICATIONS

Have a look at my DBLP entry or my entry at Google Scholar; these are reasonably up-to-date.

ACADEMIC HISTORY

Prior to my current position, I held the following posts: